基于低功耗FPGA芯片的数字控制电路设计

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中图分类号：TN711；TN713 文献标识码：A 文章编号：2096-4706（2025）08-0029-05

Abstract：Digital control circuits constitute one of the components of the radar receiver system. Under the same functionaldesign，inordertorducethepowerconsumptionofthecoredeviceFPGAofthedigitalcontrolcircuitwithnthefull temperaturerange，thedesignofthedigitalcontrolcircuit isoptimized.Comparativedesignsareconductedfordomestic FPGA devices JFM7K325T and JFMK50T4.It can beobtained that the power consumption of JFM7K325T at normal temperature isapproximately 2 . 3 W ，and within the full temperature range （-40 to ），the power consumption reaches1.9 to 8 W， and the maximum current required bythecorevoltageis2A.Thepowerconsumptionof JFMK5OT4 atroom temperature is only 1.175 W， and the maximum power consumption reaches 2 . 8 W within the full temperature range. Under the same environmental temperature，the power consumption is decreased by 1 / 2 to 3/4.The power supply design， thermal design，and spatial design of the chips are significantly reduced， and the cost of a single chip can also be lowered by 2/3.

Keywords： domesticization; FPGA; low power consumption; digital control circuit

0 引言

雷达接收机系统中数字控制电路常用的FPGA芯片为Xilinx公司的XCK325T（以下简称K7），其优点包括IO资源丰富、高速口通道多、体积合理。（剩余4990字）